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Infographic
On July 26, Western Digital of the United States announced that it successfully developed the world's first 64-layer 3D NAND technology "BiCS"
.
The Yokkaichi Plant, jointly operated with Toshiba, has started pilot production
.
In the first half of 2017, it is expected that full-fledged mass production technology
will be overhauled.
The 64-layer third-generation 3D NAND technology BiCS3 is characterized by 3bit/battery technology and a high-level semiconductor process that achieves high capacity, high performance, and high recognition at a favorable price
.
Together with the company's existing BiCS2, 3D NAND portfolio is poised for significant expansion
.
First with a capacity of 256 Gbit, then 512 Gbit through chip units
.
Now, the 256Gbit 3bit/cell chip will be the smallest in the
industry.
Samples to OEM customers are expected to begin in the fourth quarter of this year and mass production
for the retail market will begin in the fourth quarter of 2016.
Infographic
On July 26, Western Digital of the United States announced that it successfully developed the world's first 64-layer 3D NAND technology "BiCS"
.
The Yokkaichi Plant, jointly operated with Toshiba, has started pilot production
.
In the first half of 2017, it is expected that full-fledged mass production technology
will be overhauled.
The 64-layer third-generation 3D NAND technology BiCS3 is characterized by 3bit/battery technology and a high-level semiconductor process that achieves high capacity, high performance, and high recognition at a favorable price
.
Together with the company's existing BiCS2, 3D NAND portfolio is poised for significant expansion
.
First with a capacity of 256 Gbit, then 512 Gbit through chip units
.
Now, the 256Gbit 3bit/cell chip will be the smallest in the
industry.
Samples to OEM customers are expected to begin in the fourth quarter of this year and mass production
for the retail market will begin in the fourth quarter of 2016.