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Recently, Sun Zhong, a researcher from the Brain-inspired Intelligent Chip Research Center, instructed undergraduates to publish a research paper in IEEE Transactions on Circuits and Systems I: Regular Papers (TCAS-I), a top international journal in the field of circuits and systems, with the title of "Modeling and Mitigating the Interconnect".
Figure 1 AMC architecture and RRAM array with interconnect resistors
Resistive variable memory (RRAM) has outstanding analog conductance characteristics.
Simulation of MVM circuits is particularly difficult due to the tight coupling of interconnect resistances to cross-point RRAM devices
Figure 2.
In the RRAM analog matrix calculation circuit, since the conductance value of the RRAM can only be positive, for the matrix operation with negative elements, it is usually necessary to decompose the matrix into the form of subtracting two positive element matrices
Figure 3 Comparison of CC-RS circuit structure and three circuit areas, power consumption and calculation error
This work further analyzes the actual performance of the three circuits with an example of discrete Fourier transform (DFT)
Read the original text: https://ieeexplore.
